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Boot Process definition for UC3 parts

The behavior of the UC3 boot process for bootloader is defined by the fuses values and two Words in the user page.

The AT32UC3 boot process is described in both documents:

User page word1 definition

#define BOOT_CFG1   (*(volatile uint32_t *)BOOT_CFG1_ADDRESS)
 
#define BOOT_CFG1_ADDRESS   (FLASH_API_USER_PAGE_ADDRESS + BOOT_CFG1_OFFSET)
 
#define BOOT_CFG1_OFFSET   (FLASH_API_USER_PAGE_SIZE - BOOT_CFG1_SIZE)
 
#define BOOT_CFG1_SIZE   4
 
#define BOOT_CFG1_BOOT_KEY1   16
 
#define BOOT_CFG1_BOOT_KEY1_MASK   0xFFFF0000
 
#define BOOT_CFG1_BOOT_KEY1_OFFSET   16
 
#define BOOT_CFG1_BOOT_KEY1_SIZE   16
 
#define BOOT_CFG1_BOOT_KEY1_VALUE   0xE11E
 
#define BOOT_CFG1_FORCE   9
 
#define BOOT_CFG1_FORCE_MASK   0x00000200
 
#define BOOT_CFG1_FORCE_OFFSET   9
 
#define BOOT_CFG1_FORCE_SIZE   1
 
#define BOOT_CFG1_IO_COND_EN   8
 
#define BOOT_CFG1_IO_COND_EN_MASK   0x00000100
 
#define BOOT_CFG1_IO_COND_EN_OFFSET   8
 
#define BOOT_CFG1_IO_COND_EN_SIZE   1
 
#define BOOT_CFG1_CRC8   0
 
#define BOOT_CFG1_CRC8_MASK   0x000000FF
 
#define BOOT_CFG1_CRC8_OFFSET   0
 
#define BOOT_CFG1_CRC8_SIZE   8
 
#define BOOT_CFG1_CRC8_POLYNOMIAL   0x107
 

User page word2 definition

#define BOOT_CFG2   (*(volatile U32 *)BOOT_CFG2_ADDRESS)
 
#define BOOT_CFG2_ADDRESS   (FLASH_API_USER_PAGE_ADDRESS + BOOT_CFG2_OFFSET)
 
#define BOOT_CFG2_OFFSET   (FLASH_API_USER_PAGE_SIZE - BOOT_CFG1_SIZE - BOOT_CFG2_SIZE)
 
#define BOOT_CFG2_SIZE   4
 
#define BOOT_CFG2_BOOT_KEY   17
 
#define BOOT_CFG2_BOOT_KEY_MASK   0xFFFE0000
 
#define BOOT_CFG2_BOOT_KEY_OFFSET   17
 
#define BOOT_CFG2_BOOT_KEY_SIZE   15
 
#define BOOT_CFG2_BOOT_KEY_VALUE   0x494F
 
#define BOOT_CFG2_IO_COND_LEVEL   16
 
#define BOOT_CFG2_IO_COND_LEVEL_MASK   0x00010000
 
#define BOOT_CFG2_IO_COND_LEVEL_OFFSET   16
 
#define BOOT_CFG2_IO_COND_LEVEL_SIZE   1
 
#define BOOT_CFG2_IO_COND_PIN   8
 
#define BOOT_CFG2_IO_COND_PIN_MASK   0x0000FF00
 
#define BOOT_CFG2_IO_COND_PIN_OFFSET   8
 
#define BOOT_CFG2_IO_COND_PIN_SIZE   8
 
#define BOOT_CFG2_CRC8   0
 
#define BOOT_CFG2_CRC8_MASK   0x000000FF
 
#define BOOT_CFG2_CRC8_OFFSET   0
 
#define BOOT_CFG2_CRC8_SIZE   8
 
#define BOOT_CFG2_CRC8_POLYNOMIAL   0x107
 

SRAM key definition

It is used by boot process after a hot CPU reset

#define BOOT_KEY   (*(volatile U32 *)BOOT_KEY_ADDRESS)
 
#define BOOT_KEY_ADDRESS   (AVR32_SRAM_ADDRESS + BOOT_KEY_OFFSET)
 
#define BOOT_KEY_OFFSET   0x00000000
 
#define BOOT_KEY_SIZE   4
 
#define BOOT_KEY_VALUE   ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K')
 

User program start address definition

#define PROGRAM_START_ADDRESS   (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET)
 
#define PROGRAM_START_OFFSET   0x00002000
 

#define BOOT_CFG1   (*(volatile uint32_t *)BOOT_CFG1_ADDRESS)

Referenced by isp_force_boot_isp().

#define BOOT_CFG1_ADDRESS   (FLASH_API_USER_PAGE_ADDRESS + BOOT_CFG1_OFFSET)

Referenced by isp_force_boot_isp().

#define BOOT_CFG1_BOOT_KEY1   16
#define BOOT_CFG1_BOOT_KEY1_MASK   0xFFFF0000
#define BOOT_CFG1_BOOT_KEY1_OFFSET   16
#define BOOT_CFG1_BOOT_KEY1_SIZE   16
#define BOOT_CFG1_BOOT_KEY1_VALUE   0xE11E
#define BOOT_CFG1_CRC8   0
#define BOOT_CFG1_CRC8_MASK   0x000000FF

Referenced by isp_force_boot_isp().

#define BOOT_CFG1_CRC8_OFFSET   0

Referenced by isp_force_boot_isp().

#define BOOT_CFG1_CRC8_POLYNOMIAL   0x107

Referenced by isp_crc8().

#define BOOT_CFG1_CRC8_SIZE   8
#define BOOT_CFG1_FORCE   9
#define BOOT_CFG1_FORCE_MASK   0x00000200

Referenced by isp_force_boot_isp().

#define BOOT_CFG1_FORCE_OFFSET   9

Referenced by isp_force_boot_isp().

#define BOOT_CFG1_FORCE_SIZE   1
#define BOOT_CFG1_IO_COND_EN   8
#define BOOT_CFG1_IO_COND_EN_MASK   0x00000100
#define BOOT_CFG1_IO_COND_EN_OFFSET   8
#define BOOT_CFG1_IO_COND_EN_SIZE   1
#define BOOT_CFG1_OFFSET   (FLASH_API_USER_PAGE_SIZE - BOOT_CFG1_SIZE)
#define BOOT_CFG1_SIZE   4
#define BOOT_CFG2   (*(volatile U32 *)BOOT_CFG2_ADDRESS)
#define BOOT_CFG2_ADDRESS   (FLASH_API_USER_PAGE_ADDRESS + BOOT_CFG2_OFFSET)
#define BOOT_CFG2_BOOT_KEY   17
#define BOOT_CFG2_BOOT_KEY_MASK   0xFFFE0000
#define BOOT_CFG2_BOOT_KEY_OFFSET   17
#define BOOT_CFG2_BOOT_KEY_SIZE   15
#define BOOT_CFG2_BOOT_KEY_VALUE   0x494F
#define BOOT_CFG2_CRC8   0
#define BOOT_CFG2_CRC8_MASK   0x000000FF
#define BOOT_CFG2_CRC8_OFFSET   0
#define BOOT_CFG2_CRC8_POLYNOMIAL   0x107
#define BOOT_CFG2_CRC8_SIZE   8
#define BOOT_CFG2_IO_COND_LEVEL   16
#define BOOT_CFG2_IO_COND_LEVEL_MASK   0x00010000
#define BOOT_CFG2_IO_COND_LEVEL_OFFSET   16
#define BOOT_CFG2_IO_COND_LEVEL_SIZE   1
#define BOOT_CFG2_IO_COND_PIN   8
#define BOOT_CFG2_IO_COND_PIN_MASK   0x0000FF00
#define BOOT_CFG2_IO_COND_PIN_OFFSET   8
#define BOOT_CFG2_IO_COND_PIN_SIZE   8
#define BOOT_CFG2_OFFSET   (FLASH_API_USER_PAGE_SIZE - BOOT_CFG1_SIZE - BOOT_CFG2_SIZE)
#define BOOT_CFG2_SIZE   4
#define BOOT_KEY   (*(volatile U32 *)BOOT_KEY_ADDRESS)
#define BOOT_KEY_ADDRESS   (AVR32_SRAM_ADDRESS + BOOT_KEY_OFFSET)
#define BOOT_KEY_OFFSET   0x00000000
#define BOOT_KEY_SIZE   4
#define BOOT_KEY_VALUE   ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K')
#define PROGRAM_START_ADDRESS   (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET)
#define PROGRAM_START_OFFSET   0x00002000