Atmel Software Framework

ieee_154g.h File Reference

This header holds all IEEE 802.15.4g-2012 constants and attribute identifiers.

Copyright (c) 2015 Atmel Corporation. All rights reserved.

Data Structures

struct  fsk_tag
 
struct  leg_oqpsk_tag
 
struct  mr_oqpsk_tag
 
struct  new_phy_tag
 
struct  ofdm_tag
 
struct  oqpsk_tag
 
union  phy_mode_tag
 PHY mode structure. More...
 
struct  phy_tag
 
union  rate_tag
 
union  sun_phy_mode_tag
 
struct  sun_phy_tag
 

Macros

#define aMaxPHYPacketSize_4g   2047
 Maximum PHY packet size of SUN PHY. More...
 
#define aMinTurnaroundTimeSUNPHY   1000
 Minimum turnaround time for SUN PHY. More...
 
#define F2FSK_SFD_0_CODED   0x72F6
 FSK configuration parameters. More...
 
#define F2FSK_SFD_0_UNCODED   0x7209
 
#define F2FSK_SFD_1_CODED   0xB4C6
 
#define F2FSK_SFD_1_UNCODED   0x705E
 
#define F4FSK_SFD_0_CODED   0xBFAEFFBE
 
#define F4FSK_SFD_0_UNCODED   0xBFAEAAEB
 
#define F4FSK_SFD_1_CODED   0xEFBAFABE
 
#define F4FSK_SFD_1_UNCODED   0xBFAABBFE
 
#define FCS_TYPE_2_OCTETS   (1)
 
#define FCS_TYPE_4_OCTETS   (0)
 
#define FEC_SCHEME_NRNSC   0
 
#define FEC_SCHEME_RSC   1
 
#define FSK_2450_MOD1_CH_SPAC   200000
 
#define FSK_2450_MOD1_F0   2400200000UL
 
#define FSK_2450_MOD2_CH_SPAC   400000
 
#define FSK_2450_MOD2_F0   2400400000UL
 
#define FSK_2450_MOD3_CH_SPAC   400000
 
#define FSK_2450_MOD3_F0   2400400000UL
 
#define FSK_470_MOD1_CH_SPAC   200000
 
#define FSK_470_MOD1_F0   470200000
 FSK constants. More...
 
#define FSK_470_MOD2_CH_SPAC   400000
 
#define FSK_470_MOD2_F0   470400000
 
#define FSK_470_MOD3_CH_SPAC   400000
 
#define FSK_470_MOD3_F0   470400000
 
#define FSK_780_MOD1_CH_SPAC   200000
 
#define FSK_780_MOD1_F0   779200000
 
#define FSK_780_MOD2_CH_SPAC   400000
 
#define FSK_780_MOD2_F0   779400000
 
#define FSK_780_MOD3_CH_SPAC   400000
 
#define FSK_780_MOD3_F0   779400000
 
#define FSK_863_MOD1_CH_SPAC   200000
 
#define FSK_863_MOD1_F0   863125000
 
#define FSK_863_MOD2_CH_SPAC   400000
 
#define FSK_863_MOD2_F0   863225000
 
#define FSK_863_MOD3_CH_SPAC   400000
 
#define FSK_863_MOD3_F0   863225000
 
#define FSK_915_MOD1_CH_SPAC   200000
 
#define FSK_915_MOD1_F0   902200000
 
#define FSK_915_MOD2_CH_SPAC   400000
 
#define FSK_915_MOD2_F0   902400000
 
#define FSK_915_MOD3_CH_SPAC   400000
 
#define FSK_915_MOD3_F0   902400000
 
#define FSK_917_MOD1_CH_SPAC   200000
 
#define FSK_917_MOD1_F0   917100000
 
#define FSK_917_MOD2_CH_SPAC   400000
 
#define FSK_917_MOD2_F0   917300000
 
#define FSK_917_MOD3_CH_SPAC   400000
 
#define FSK_917_MOD3_F0   917300000
 
#define FSK_920_MOD1_CH_SPAC   200000
 
#define FSK_920_MOD1_F0   920600000
 
#define FSK_920_MOD2_CH_SPAC   400000
 
#define FSK_920_MOD2_F0   920900000
 
#define FSK_920_MOD3_CH_SPAC   600000
 
#define FSK_920_MOD3_F0   920800000
 
#define FSK_920_MOD4_CH_SPAC   600000
 
#define FSK_920_MOD4_F0   920800000
 
#define FSK_950_MOD1_CH_SPAC   200000
 
#define FSK_950_MOD1_F0   951000000
 
#define FSK_950_MOD2_CH_SPAC   400000
 
#define FSK_950_MOD2_F0   951100000
 
#define FSK_950_MOD3_CH_SPAC   600000
 
#define FSK_950_MOD3_F0   951200000
 
#define FSK_950_MOD4_CH_SPAC   600000
 
#define FSK_950_MOD4_F0   951200000
 
#define LEG_2450_CH_SPAC   5000000
 
#define LEG_2450_F0   2405000000UL
 
#define LEG_780_F0   780000000
 Legacy O-QPSK constants. More...
 
#define LEG_868_F0   868300000
 
#define LEG_915_CH_SPAC   2000000
 
#define LEG_915_F0   906000000
 
#define macACKTiming   (0x25)
 Duration between end of incoming frame and ACK transmission start. More...
 
#define macACKWaitDuration   (0x24)
 The maximum duration for waiting for an incoming ACK. More...
 
#define macAdaptDataRateForACK   (0x28)
 Adapt data rate of the incoming frame to use for ACK transmission. More...
 
#define macFCSType   0xF2
 The type of the FCS. More...
 
#define macFrameFilterFrameTypes   (0x2A)
 Frame filter configuration, frame type. More...
 
#define macFrameFilterFrameVersions   (0x2B)
 Frame filter configuration, frame version. More...
 
#define OFDM_2450_OPT1_CH_SPAC   1200000
 
#define OFDM_2450_OPT1_F0   2401200000UL
 
#define OFDM_2450_OPT2_CH_SPAC   800000
 
#define OFDM_2450_OPT2_F0   2400800000UL
 
#define OFDM_2450_OPT3_CH_SPAC   400000
 
#define OFDM_2450_OPT3_F0   2400400000UL
 
#define OFDM_2450_OPT4_CH_SPAC   200000
 
#define OFDM_2450_OPT4_F0   2400200000UL
 
#define OFDM_470_OPT4_CH_SPAC   400000
 
#define OFDM_470_OPT4_F0   470400000
 OFDM constants. More...
 
#define OFDM_780_OPT1_CH_SPAC   1200000
 
#define OFDM_780_OPT1_F0   780200000
 
#define OFDM_780_OPT2_CH_SPAC   800000
 
#define OFDM_780_OPT2_F0   779800000
 
#define OFDM_780_OPT3_CH_SPAC   400000
 
#define OFDM_780_OPT3_F0   779400000
 
#define OFDM_780_OPT4_CH_SPAC   200000
 
#define OFDM_780_OPT4_F0   779200000
 
#define OFDM_863_OPT1_CH_SPAC   1200000
 
#define OFDM_863_OPT1_F0   863625000
 
#define OFDM_863_OPT2_CH_SPAC   800000
 
#define OFDM_863_OPT2_F0   863425000
 
#define OFDM_863_OPT3_CH_SPAC   400000
 
#define OFDM_863_OPT3_F0   863225000
 
#define OFDM_863_OPT4_CH_SPAC   200000
 
#define OFDM_863_OPT4_F0   863125000
 
#define OFDM_915_OPT1_CH_SPAC   1200000
 
#define OFDM_915_OPT1_F0   903200000
 
#define OFDM_915_OPT2_CH_SPAC   800000
 
#define OFDM_915_OPT2_F0   902800000
 
#define OFDM_915_OPT3_CH_SPAC   400000
 
#define OFDM_915_OPT3_F0   902400000
 
#define OFDM_915_OPT4_CH_SPAC   200000
 
#define OFDM_915_OPT4_F0   902200000
 
#define OFDM_917_OPT1_CH_SPAC   1200000
 
#define OFDM_917_OPT1_F0   917900000
 
#define OFDM_917_OPT2_CH_SPAC   800000
 
#define OFDM_917_OPT2_F0   917500000
 
#define OFDM_917_OPT3_CH_SPAC   400000
 
#define OFDM_917_OPT3_F0   917300000
 
#define OFDM_917_OPT4_CH_SPAC   200000
 
#define OFDM_917_OPT4_F0   917100000
 
#define OFDM_920_OPT1_CH_SPAC   1200000
 
#define OFDM_920_OPT1_F0   921200000
 
#define OFDM_920_OPT2_CH_SPAC   800000
 
#define OFDM_920_OPT2_F0   920800000
 
#define OFDM_920_OPT3_CH_SPAC   400000
 
#define OFDM_920_OPT3_F0   920400000
 
#define OFDM_920_OPT4_CH_SPAC   200000
 
#define OFDM_920_OPT4_F0   920200000
 
#define OFDM_950_OPT2_CH_SPAC   800000
 
#define OFDM_950_OPT2_F0   951300000
 
#define OFDM_950_OPT3_CH_SPAC   400000
 
#define OFDM_950_OPT3_F0   951100000
 
#define OFDM_950_OPT4_CH_SPAC   200000
 
#define OFDM_950_OPT4_F0   951000000
 
#define OQPSK_2450_CH_SPAC   5000000
 
#define OQPSK_2450_F0   2405000000UL
 
#define OQPSK_470_CH_SPAC   400000
 
#define OQPSK_470_F0   470400000
 MR-O-QPSK constants. More...
 
#define OQPSK_780_CH_SPAC   2000000
 
#define OQPSK_780_F0   780000000
 
#define OQPSK_863_CH_SPAC   650000
 
#define OQPSK_863_F0   868300000
 
#define OQPSK_915_CH_SPAC   2000000
 
#define OQPSK_915_F0   904000000
 
#define OQPSK_917_CH_SPAC   2000000
 
#define OQPSK_917_F0   918100000
 
#define OQPSK_920_CH_SPAC   200000
 
#define OQPSK_920_F0   920600000
 
#define phyCCADuration   (0x11)
 The duration for CCA, specified in symbols. More...
 
#define phyCCAThreshold   (0x26)
 CCA threshold. More...
 
#define phyCCATimeMethod   (0x12)
 This parameter determines how to calculate the time required to perform CCA detection. More...
 
#define phyCurrentSUNPageEntry   (0x1A)
 Defines the current frequency band, modulation scheme, and particular PHY mode when phyCurrentPage = 7 or 8. More...
 
#define phyFSKDataRate   (0x31)
 Data rate for FSK. More...
 
#define phyFSKFECEnabled   (0x13)
 A value of TRUE indicates that FEC is turned on. More...
 
#define phyFSKFECInterleavingRSC   (0x14)
 A value of TRUE indicates that interleaving is enabled for RSC. More...
 
#define phyFSKFECScheme   (0x15)
 A value of zero indicates that a nonrecursive and nonsystematic code (NRNSC) is employed. More...
 
#define phyFSKModeSwitchEnabled   (0x2C)
 FSK mode switch. More...
 
#define phyFSKPreambleLength   (0x1F)
 The number of 1-octet patterns in the preamble. More...
 
#define phyFSKRawModeEnabled   (0x32)
 FSK raw mode enable. More...
 
#define phyFSKRawModeRxLength   (0x33)
 FSK raw mode Rx length. More...
 
#define phyFSKScramblePSDU   (0x21)
 A value of FALSE indicates that data whitening of the PSDU is disabled. More...
 
#define phyHighRateEnabled   (0x34)
 High rate mode for legacy O-QPSK. More...
 
#define phyMaxSUNChannelSupported   (0x17)
 The maximum channel number supported by the device. More...
 
#define phyModeSwitchDuration   (0x30)
 Maximum mode switch receive duration. More...
 
#define phyModeSwitchNewMode   (0x2F)
 New PHY mode used after mode switch PPDU. More...
 
#define phyModeSwitchParameterEntries   (0x1E)
 An array of up to four rows, where each row consists of a set of ModeSwitchDescriptor entries. More...
 
#define phyModeSwitchSettlingDelay   (0x2E)
 Mode switch settling delay in us. More...
 
#define phyMRFSKSFD   (0x20)
 Determines which group of SFDs is used. More...
 
#define phyNumModeSwitchParameterEntries   (0x1D)
 The number of current entries in phyModeSwitchParameterEntries. More...
 
#define phyNumSUNPageEntriesSupported   (0x18)
 The number of SUN channel page entries supported by the device. More...
 
#define phyOFDMInterleaving   (0x22)
 A value of zero indicates an interleaving depth of one symbol. More...
 
#define phyOFDMMCS   (0x29)
 MCS setting; used for OFDM only. More...
 
#define phyOnAirDuration   (0x27)
 On air duration or tx duration measured in us. More...
 
#define phyOQPSKRateMode   (0x2D)
 MR-O-QPSK rate mode. More...
 
#define phyPHRDuration   (0x23)
 The duration of the PHR, in symbols, for the current PHY. More...
 
#define phyRPCEnabled   (0x35)
 Enable reduce power consumption for FSK and MR-OQPSK. More...
 
#define phySetting   (0x10)
 Attribute Id addresses the PHY settings; id is not standard-compliant. More...
 
#define phySUNChannelsSupported   (0x16)
 The list of channel numbers supported when phyCurrentPage = 7 or 8. More...
 
#define phySUNGenericPHYDescriptors   (0x1C)
 A table of GenericPHYDescriptor entries, where each entry is used to define a channel page 10 PHY mode. More...
 
#define phySUNNumGenericPHYDescriptors   (0x1B)
 The number of GenericPHYDescriptor entries supported by the device. More...
 
#define phySUNPageEntriesSupported   (0x19)
 Each entry in the list contains the description of a frequency band, modulation scheme, and particular PHY mode implemented by the device. More...
 

Typedefs

typedef enum fsk_bt_tag fsk_bt_t
 
typedef enum fsk_mod_type_tag fsk_mod_type_t
 
typedef enum fsk_op_mode_tag fsk_op_mode_t
 
typedef enum fsk_sym_rate_tag fsk_sym_rate_t
 
typedef struct fsk_tag fsk_t
 
typedef struct leg_oqpsk_tag leg_oqpsk_t
 
typedef enum mod_idx_tag mod_idx_t
 
typedef enum modulation_tag modulation_t
 Modulation schemes. More...
 
typedef struct mr_oqpsk_tag mr_oqpsk_t
 
typedef struct new_phy_tag new_phy_t
 
typedef enum ofdm_mcs_tag ofdm_mcs_t
 
typedef enum ofdm_option_tag ofdm_option_t
 
typedef struct ofdm_tag ofdm_t
 
typedef enum oqpsk_chip_rate_tag oqpsk_chip_rate_t
 Enumeration for O-QPSK chip rate. More...
 
typedef enum oqsk_data_rate_tag oqpsk_data_rate_t
 
typedef enum oqpsk_rate_mode_tag oqpsk_rate_mode_t
 
typedef struct oqpsk_tag oqpsk_t
 
typedef union phy_mode_tag phy_mode_t
 PHY mode structure. More...
 
typedef struct phy_tag phy_t
 
typedef union rate_tag rate_t
 
typedef enum sun_freq_band_tag sun_freq_band_t
 SUN PHY frequency bands. More...
 
typedef union sun_phy_mode_tag sun_phy_mode_t
 
typedef struct sun_phy_tag sun_phy_t
 

Enumerations

enum  fsk_bt_tag {
  FSK_BT_0_5,
  FSK_BT_1_0,
  FSK_BT_1_5,
  FSK_BT_2_0
}
 
enum  fsk_mod_type_tag {
  F2FSK,
  F4FSK
}
 
enum  fsk_op_mode_tag {
  FSK_OP_MOD_1 = 1,
  FSK_OP_MOD_2,
  FSK_OP_MOD_3,
  FSK_OP_MOD_4
}
 
enum  fsk_sym_rate_tag {
  FSK_SYM_RATE_50,
  FSK_SYM_RATE_100,
  FSK_SYM_RATE_150,
  FSK_SYM_RATE_200,
  FSK_SYM_RATE_300,
  FSK_SYM_RATE_400
}
 
enum  mod_idx_tag {
  MOD_IDX_0_375 = 0,
  MOD_IDX_0_5 = 1,
  MOD_IDX_0_75 = 2,
  MOD_IDX_1_0 = 3,
  MOD_IDX_1_25 = 4,
  MOD_IDX_1_5 = 5,
  MOD_IDX_1_75 = 6,
  MOD_IDX_2_0 = 7
}
 
enum  modulation_tag {
  FSK,
  OFDM,
  OQPSK,
  LEG_OQPSK
}
 Modulation schemes. More...
 
enum  ofdm_mcs_tag {
  MCS0,
  MCS1,
  MCS2,
  MCS3,
  MCS4,
  MCS5,
  MCS6
}
 
enum  ofdm_option_tag {
  OFDM_OPT_1,
  OFDM_OPT_2,
  OFDM_OPT_3,
  OFDM_OPT_4
}
 
enum  oqpsk_chip_rate_tag {
  CHIP_RATE_100,
  CHIP_RATE_200,
  CHIP_RATE_1000,
  CHIP_RATE_2000
}
 Enumeration for O-QPSK chip rate. More...
 
enum  oqpsk_rate_mode_tag {
  OQPSK_RATE_MOD_0,
  OQPSK_RATE_MOD_1,
  OQPSK_RATE_MOD_2,
  OQPSK_RATE_MOD_3,
  OQPSK_RATE_MOD_4
}
 
enum  oqsk_data_rate_tag {
  OQPSK_DATA_RATE_250,
  OQPSK_DATA_RATE_500,
  OQPSK_DATA_RATE_1000
}
 
enum  sun_freq_band_tag {
  EU_169,
  US_450,
  CHINA_470,
  CHINA_780,
  EU_863,
  US_896,
  US_901,
  US_915,
  KOREA_917,
  JAPAN_920,
  US_928,
  JAPAN_950,
  US_1427,
  WORLD_2450
}
 SUN PHY frequency bands. More...
 

#define aMaxPHYPacketSize_4g   2047

Maximum PHY packet size of SUN PHY.

#define aMinTurnaroundTimeSUNPHY   1000

Minimum turnaround time for SUN PHY.

#define F2FSK_SFD_0_CODED   0x72F6

FSK configuration parameters.

#define F2FSK_SFD_0_UNCODED   0x7209
#define F2FSK_SFD_1_CODED   0xB4C6
#define F2FSK_SFD_1_UNCODED   0x705E
#define F4FSK_SFD_0_CODED   0xBFAEFFBE
#define F4FSK_SFD_0_UNCODED   0xBFAEAAEB
#define F4FSK_SFD_1_CODED   0xEFBAFABE
#define F4FSK_SFD_1_UNCODED   0xBFAABBFE
#define FCS_TYPE_2_OCTETS   (1)
#define FCS_TYPE_4_OCTETS   (0)
#define FEC_SCHEME_NRNSC   0
#define FEC_SCHEME_RSC   1
#define FSK_2450_MOD1_CH_SPAC   200000
#define FSK_2450_MOD1_F0   2400200000UL
#define FSK_2450_MOD2_CH_SPAC   400000
#define FSK_2450_MOD2_F0   2400400000UL
#define FSK_2450_MOD3_CH_SPAC   400000
#define FSK_2450_MOD3_F0   2400400000UL
#define FSK_470_MOD1_CH_SPAC   200000
#define FSK_470_MOD1_F0   470200000

FSK constants.

#define FSK_470_MOD2_CH_SPAC   400000
#define FSK_470_MOD2_F0   470400000
#define FSK_470_MOD3_CH_SPAC   400000
#define FSK_470_MOD3_F0   470400000
#define FSK_780_MOD1_CH_SPAC   200000
#define FSK_780_MOD1_F0   779200000
#define FSK_780_MOD2_CH_SPAC   400000
#define FSK_780_MOD2_F0   779400000
#define FSK_780_MOD3_CH_SPAC   400000
#define FSK_780_MOD3_F0   779400000
#define FSK_863_MOD1_CH_SPAC   200000
#define FSK_863_MOD1_F0   863125000
#define FSK_863_MOD2_CH_SPAC   400000
#define FSK_863_MOD2_F0   863225000
#define FSK_863_MOD3_CH_SPAC   400000
#define FSK_863_MOD3_F0   863225000
#define FSK_915_MOD1_CH_SPAC   200000
#define FSK_915_MOD1_F0   902200000
#define FSK_915_MOD2_CH_SPAC   400000
#define FSK_915_MOD2_F0   902400000
#define FSK_915_MOD3_CH_SPAC   400000
#define FSK_915_MOD3_F0   902400000
#define FSK_917_MOD1_CH_SPAC   200000
#define FSK_917_MOD1_F0   917100000
#define FSK_917_MOD2_CH_SPAC   400000
#define FSK_917_MOD2_F0   917300000
#define FSK_917_MOD3_CH_SPAC   400000
#define FSK_917_MOD3_F0   917300000
#define FSK_920_MOD1_CH_SPAC   200000
#define FSK_920_MOD1_F0   920600000
#define FSK_920_MOD2_CH_SPAC   400000
#define FSK_920_MOD2_F0   920900000
#define FSK_920_MOD3_CH_SPAC   600000
#define FSK_920_MOD3_F0   920800000
#define FSK_920_MOD4_CH_SPAC   600000
#define FSK_920_MOD4_F0   920800000
#define FSK_950_MOD1_CH_SPAC   200000
#define FSK_950_MOD1_F0   951000000
#define FSK_950_MOD2_CH_SPAC   400000
#define FSK_950_MOD2_F0   951100000
#define FSK_950_MOD3_CH_SPAC   600000
#define FSK_950_MOD3_F0   951200000
#define FSK_950_MOD4_CH_SPAC   600000
#define FSK_950_MOD4_F0   951200000
#define LEG_2450_CH_SPAC   5000000
#define LEG_2450_F0   2405000000UL
#define LEG_780_F0   780000000

Legacy O-QPSK constants.

#define LEG_868_F0   868300000
#define LEG_915_CH_SPAC   2000000
#define LEG_915_F0   906000000
#define macACKTiming   (0x25)

Duration between end of incoming frame and ACK transmission start.

#define macACKWaitDuration   (0x24)

The maximum duration for waiting for an incoming ACK.

#define macAdaptDataRateForACK   (0x28)

Adapt data rate of the incoming frame to use for ACK transmission.

#define macFCSType   0xF2

The type of the FCS.

A value of zero indicates a 4-octet FCS. A value of one indicates a 2-octet FCS. This attribute is only valid for SUN PHYs.

#define macFrameFilterFrameTypes   (0x2A)

Frame filter configuration, frame type.

#define macFrameFilterFrameVersions   (0x2B)

Frame filter configuration, frame version.

#define OFDM_2450_OPT1_CH_SPAC   1200000
#define OFDM_2450_OPT1_F0   2401200000UL
#define OFDM_2450_OPT2_CH_SPAC   800000
#define OFDM_2450_OPT2_F0   2400800000UL
#define OFDM_2450_OPT3_CH_SPAC   400000
#define OFDM_2450_OPT3_F0   2400400000UL
#define OFDM_2450_OPT4_CH_SPAC   200000
#define OFDM_2450_OPT4_F0   2400200000UL
#define OFDM_470_OPT4_CH_SPAC   400000
#define OFDM_470_OPT4_F0   470400000

OFDM constants.

#define OFDM_780_OPT1_CH_SPAC   1200000
#define OFDM_780_OPT1_F0   780200000
#define OFDM_780_OPT2_CH_SPAC   800000
#define OFDM_780_OPT2_F0   779800000
#define OFDM_780_OPT3_CH_SPAC   400000
#define OFDM_780_OPT3_F0   779400000
#define OFDM_780_OPT4_CH_SPAC   200000
#define OFDM_780_OPT4_F0   779200000
#define OFDM_863_OPT1_CH_SPAC   1200000
#define OFDM_863_OPT1_F0   863625000
#define OFDM_863_OPT2_CH_SPAC   800000
#define OFDM_863_OPT2_F0   863425000
#define OFDM_863_OPT3_CH_SPAC   400000
#define OFDM_863_OPT3_F0   863225000
#define OFDM_863_OPT4_CH_SPAC   200000
#define OFDM_863_OPT4_F0   863125000
#define OFDM_915_OPT1_CH_SPAC   1200000
#define OFDM_915_OPT1_F0   903200000
#define OFDM_915_OPT2_CH_SPAC   800000
#define OFDM_915_OPT2_F0   902800000
#define OFDM_915_OPT3_CH_SPAC   400000
#define OFDM_915_OPT3_F0   902400000
#define OFDM_915_OPT4_CH_SPAC   200000
#define OFDM_915_OPT4_F0   902200000
#define OFDM_917_OPT1_CH_SPAC   1200000
#define OFDM_917_OPT1_F0   917900000
#define OFDM_917_OPT2_CH_SPAC   800000
#define OFDM_917_OPT2_F0   917500000
#define OFDM_917_OPT3_CH_SPAC   400000
#define OFDM_917_OPT3_F0   917300000
#define OFDM_917_OPT4_CH_SPAC   200000
#define OFDM_917_OPT4_F0   917100000
#define OFDM_920_OPT1_CH_SPAC   1200000
#define OFDM_920_OPT1_F0   921200000
#define OFDM_920_OPT2_CH_SPAC   800000
#define OFDM_920_OPT2_F0   920800000
#define OFDM_920_OPT3_CH_SPAC   400000
#define OFDM_920_OPT3_F0   920400000
#define OFDM_920_OPT4_CH_SPAC   200000
#define OFDM_920_OPT4_F0   920200000
#define OFDM_950_OPT2_CH_SPAC   800000
#define OFDM_950_OPT2_F0   951300000
#define OFDM_950_OPT3_CH_SPAC   400000
#define OFDM_950_OPT3_F0   951100000
#define OFDM_950_OPT4_CH_SPAC   200000
#define OFDM_950_OPT4_F0   951000000
#define OQPSK_2450_CH_SPAC   5000000
#define OQPSK_2450_F0   2405000000UL
#define OQPSK_470_CH_SPAC   400000
#define OQPSK_470_F0   470400000

MR-O-QPSK constants.

#define OQPSK_780_CH_SPAC   2000000
#define OQPSK_780_F0   780000000
#define OQPSK_863_CH_SPAC   650000
#define OQPSK_863_F0   868300000
#define OQPSK_915_CH_SPAC   2000000
#define OQPSK_915_F0   904000000
#define OQPSK_917_CH_SPAC   2000000
#define OQPSK_917_F0   918100000
#define OQPSK_920_CH_SPAC   200000
#define OQPSK_920_F0   920600000
#define phyCCADuration   (0x11)

The duration for CCA, specified in symbols.

#define phyCCAThreshold   (0x26)

CCA threshold.

#define phyCCATimeMethod   (0x12)

This parameter determines how to calculate the time required to perform CCA detection.

#define phyCurrentSUNPageEntry   (0x1A)

Defines the current frequency band, modulation scheme, and particular PHY mode when phyCurrentPage = 7 or 8.

#define phyFSKDataRate   (0x31)

Data rate for FSK.

#define phyFSKFECEnabled   (0x13)

A value of TRUE indicates that FEC is turned on.

A value of FALSE indicates that FEC is turned off. This attribute is only valid for the MR-FSK PHY.

#define phyFSKFECInterleavingRSC   (0x14)

A value of TRUE indicates that interleaving is enabled for RSC.

A value of FALSE indicates that interleaving is disabled for RSC. This attribute is only valid for the MR-FSK PHY.

#define phyFSKFECScheme   (0x15)

A value of zero indicates that a nonrecursive and nonsystematic code (NRNSC) is employed.

A value of one indicates that a recursive and systematic code (RSC) is employed. This attribute is only valid for the MR-FSK PHY.

#define phyFSKModeSwitchEnabled   (0x2C)

FSK mode switch.

#define phyFSKPreambleLength   (0x1F)

The number of 1-octet patterns in the preamble.

This attribute is only valid for the MR-FSK PHY.

#define phyFSKRawModeEnabled   (0x32)

FSK raw mode enable.

#define phyFSKRawModeRxLength   (0x33)

FSK raw mode Rx length.

#define phyFSKScramblePSDU   (0x21)

A value of FALSE indicates that data whitening of the PSDU is disabled.

A value of TRUE indicates that data whitening of the PSDU is enabled. This attribute is only valid for the MR-FSK PHY.

#define phyHighRateEnabled   (0x34)

High rate mode for legacy O-QPSK.

#define phyMaxSUNChannelSupported   (0x17)

The maximum channel number supported by the device.

This attribute is only valid if phyCurrentPage equals 7 or 8.

#define phyModeSwitchDuration   (0x30)

Maximum mode switch receive duration.

#define phyModeSwitchNewMode   (0x2F)

New PHY mode used after mode switch PPDU.

#define phyModeSwitchParameterEntries   (0x1E)

An array of up to four rows, where each row consists of a set of ModeSwitchDescriptor entries.

This attribute is only valid for the MR-FSK PHY.

#define phyModeSwitchSettlingDelay   (0x2E)

Mode switch settling delay in us.

#define phyMRFSKSFD   (0x20)

Determines which group of SFDs is used.

This attribute is only valid for the MR-FSK PHY.

#define phyNumModeSwitchParameterEntries   (0x1D)

The number of current entries in phyModeSwitchParameterEntries.

#define phyNumSUNPageEntriesSupported   (0x18)

The number of SUN channel page entries supported by the device.

#define phyOFDMInterleaving   (0x22)

A value of zero indicates an interleaving depth of one symbol.

A value of one indicates an interleaving depth of the number of symbols equal to the frequency domain spreading factor (SF). This attribute is only valid for the MR-OFDM PHY.

#define phyOFDMMCS   (0x29)

MCS setting; used for OFDM only.

#define phyOnAirDuration   (0x27)

On air duration or tx duration measured in us.

#define phyOQPSKRateMode   (0x2D)

MR-O-QPSK rate mode.

#define phyPHRDuration   (0x23)

The duration of the PHR, in symbols, for the current PHY.

This attribute is only valid for the MR-OFDM PHY and MR-O-QPSK PHY.

#define phyRPCEnabled   (0x35)

Enable reduce power consumption for FSK and MR-OQPSK.

#define phySetting   (0x10)

Attribute Id addresses the PHY settings; id is not standard-compliant.

#define phySUNChannelsSupported   (0x16)

The list of channel numbers supported when phyCurrentPage = 7 or 8.

#define phySUNGenericPHYDescriptors   (0x1C)

A table of GenericPHYDescriptor entries, where each entry is used to define a channel page 10 PHY mode.

#define phySUNNumGenericPHYDescriptors   (0x1B)

The number of GenericPHYDescriptor entries supported by the device.

#define phySUNPageEntriesSupported   (0x19)

Each entry in the list contains the description of a frequency band, modulation scheme, and particular PHY mode implemented by the device.

typedef enum fsk_bt_tag fsk_bt_t
typedef struct fsk_tag fsk_t
typedef struct leg_oqpsk_tag leg_oqpsk_t
typedef enum mod_idx_tag mod_idx_t

Modulation schemes.

typedef struct mr_oqpsk_tag mr_oqpsk_t
typedef struct new_phy_tag new_phy_t
typedef enum ofdm_mcs_tag ofdm_mcs_t
typedef struct ofdm_tag ofdm_t

Enumeration for O-QPSK chip rate.

typedef struct oqpsk_tag oqpsk_t
typedef union phy_mode_tag phy_mode_t

PHY mode structure.

typedef struct phy_tag phy_t
typedef union rate_tag rate_t

SUN PHY frequency bands.

typedef struct sun_phy_tag sun_phy_t

enum fsk_bt_tag
Enumerator
FSK_BT_0_5 
FSK_BT_1_0 
FSK_BT_1_5 
FSK_BT_2_0 
Enumerator
F2FSK 
F4FSK 
Enumerator
FSK_OP_MOD_1 
FSK_OP_MOD_2 
FSK_OP_MOD_3 
FSK_OP_MOD_4 
Enumerator
FSK_SYM_RATE_50 
FSK_SYM_RATE_100 
FSK_SYM_RATE_150 
FSK_SYM_RATE_200 
FSK_SYM_RATE_300 
FSK_SYM_RATE_400 
Enumerator
MOD_IDX_0_375 
MOD_IDX_0_5 
MOD_IDX_0_75 
MOD_IDX_1_0 
MOD_IDX_1_25 
MOD_IDX_1_5 
MOD_IDX_1_75 
MOD_IDX_2_0 

Modulation schemes.

Enumerator
FSK 
OFDM 
OQPSK 
LEG_OQPSK 
Enumerator
MCS0 
MCS1 
MCS2 
MCS3 
MCS4 
MCS5 
MCS6 
Enumerator
OFDM_OPT_1 
OFDM_OPT_2 
OFDM_OPT_3 
OFDM_OPT_4 

Enumeration for O-QPSK chip rate.

Enumerator
CHIP_RATE_100 
CHIP_RATE_200 
CHIP_RATE_1000 
CHIP_RATE_2000 
Enumerator
OQPSK_RATE_MOD_0 
OQPSK_RATE_MOD_1 
OQPSK_RATE_MOD_2 
OQPSK_RATE_MOD_3 
OQPSK_RATE_MOD_4 
Enumerator
OQPSK_DATA_RATE_250 
OQPSK_DATA_RATE_500 
OQPSK_DATA_RATE_1000 

SUN PHY frequency bands.

Enumerator
EU_169 
US_450 
CHINA_470 
CHINA_780 
EU_863 
US_896 
US_901 
US_915 
KOREA_917 
JAPAN_920 
US_928 
JAPAN_950 
US_1427 
WORLD_2450