Atmel Software Framework

samg/pll.h File Reference

Chip-specific PLL definitions.

Copyright (c) 2013-2015 Atmel Corporation. All rights reserved.

#include <osc.h>

Data Structures

struct  pll_config
 Hardware-specific representation of PLL configuration. More...
 

Macros

#define PLL_COUNT   0x3fU
 
#define PLL_INPUT_HZ   32768
 
#define PLL_OUTPUT_MAX_HZ   48000000
 
#define PLL_OUTPUT_MAX_HZ   96000000
 
#define PLL_OUTPUT_MAX_HZ   120000000
 
#define PLL_OUTPUT_MIN_HZ   24000000
 
#define PLLA_ID   0
 
#define PLLB_ID   1
 
Chip-specific PLL characteristics
#define NR_PLLS   2
 Number of on-chip PLLs. More...
 
PLL configuration
#define pll_get_default_rate(pll_id)
 Get the default rate in Hz of pll_id. More...
 
#define pll_config_defaults(cfg, pll_id)
 Initialize PLL configuration using default parameters. More...
 

Enumerations

enum  pll_source {
  PLL_SRC_SLCK_RC = OSC_SLCK_32K_RC,
  PLL_SRC_SLCK_XTAL = OSC_SLCK_32K_XTAL,
  PLL_NR_SOURCES
}
 PLL clock source. More...
 

Functions

static void pll_config_init (struct pll_config *p_cfg, enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul)
 
static void pll_config_read (struct pll_config *p_cfg, uint32_t ul_pll_id)
 
static void pll_config_write (const struct pll_config *p_cfg, uint32_t ul_pll_id)
 
static void pll_disable (uint32_t ul_pll_id)
 
static void pll_enable (const struct pll_config *p_cfg, uint32_t ul_pll_id)
 
static uint32_t pll_is_locked (uint32_t ul_pll_id)
 
Interaction with the PLL hardware
static void pll_enable_source (enum pll_source e_src)
 Enable the source of the pll. More...
 
static void pll_enable_config_defaults (unsigned int ul_pll_id)
 Enable the pll with the default configuration. More...