Atmel Software Framework

Power Clocks Library

Clocks Management

enum  pcl_osc_t {
  PCL_OSC0 = 0,
  PCL_OSC1 = 1
}
 The different oscillators. More...
 
enum  pcl_dfll_t {
  PCL_DFLL0 = 0,
  PCL_DFLL1 = 1
}
 The different DFLLs. More...
 
enum  pcl_mainclk_t {
  PCL_MC_RCSYS,
  PCL_MC_OSC0,
  PCL_MC_OSC1,
  PCL_MC_OSC0_PLL0,
  PCL_MC_OSC1_PLL0,
  PCL_MC_OSC0_PLL1,
  PCL_MC_OSC1_PLL1,
  PCL_MC_DFLL0,
  PCL_MC_DFLL1,
  PCL_MC_RC120M,
  PCL_MC_RC8M,
  PCL_MC_CRIPOSC
}
 Possible Main Clock Sources. More...
 
long int pcl_configure_clocks (pcl_freq_param_t *param)
 Automatically configure the CPU, PBA, PBB, and HSB clocks. More...
 
long int pcl_configure_clocks_rcsys (pcl_freq_param_t *param)
 Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock. More...
 
long int pcl_configure_clocks_rc120m (pcl_freq_param_t *param)
 Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock. More...
 
long int pcl_configure_clocks_osc0 (pcl_freq_param_t *param)
 Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock. More...
 
long int pcl_configure_clocks_dfll0 (pcl_freq_param_t *param)
 Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock. More...
 
long int pcl_switch_to_osc (pcl_osc_t osc, unsigned int fcrystal, unsigned int startup)
 Switch the main clock source to Osc0 configured in crystal mode. More...
 
long int pcl_configure_usb_clock (void)
 Configure the USB Clock. More...
 
#define pcl_freq_param_t   pm_freq_param_t
 Input and output parameters to configure clocks with pcl_configure_clocks(). More...
 
#define PCL_NOT_SUPPORTED   (-10000)
 Define "not supported" for the lib. More...
 
#define pcl_enable_module(module)   pm_enable_module(&AVR32_PM, module)
 Enable the clock of a module. More...
 
#define pcl_disable_module(module)   pm_disable_module(&AVR32_PM, module)
 Disable the clock of a module. More...
 

Power Management

unsigned long pcl_read_gplp (unsigned long gplp)
 Read the content of the GPLP registers. More...
 
void pcl_write_gplp (unsigned long gplp, unsigned long value)
 Write into the GPLP registers. More...
 

#define pcl_disable_module (   module)    pm_disable_module(&AVR32_PM, module)

Disable the clock of a module.

Parameters
moduleThe module to shut down (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" or look in the module section).
Returns
Status.
Return values
0Success.
<0An error occurred.
#define pcl_enable_module (   module)    pm_enable_module(&AVR32_PM, module)

Enable the clock of a module.

Parameters
moduleThe module to clock (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" or look in the module section).
Returns
Status.
Return values
0Success.
<0An error occurred.
#define pcl_freq_param_t   pm_freq_param_t

Input and output parameters to configure clocks with pcl_configure_clocks().

Referenced by pcl_configure_clocks(), and pcl_configure_synchronous_clocks().

#define PCL_NOT_SUPPORTED   (-10000)

Define "not supported" for the lib.

Referenced by pcl_configure_usb_clock(), and pcl_switch_to_osc().

enum pcl_dfll_t

The different DFLLs.

Enumerator
PCL_DFLL0 
PCL_DFLL1 

Possible Main Clock Sources.

Enumerator
PCL_MC_RCSYS 
PCL_MC_OSC0 
PCL_MC_OSC1 
PCL_MC_OSC0_PLL0 
PCL_MC_OSC1_PLL0 
PCL_MC_OSC0_PLL1 
PCL_MC_OSC1_PLL1 
PCL_MC_DFLL0 
PCL_MC_DFLL1 
PCL_MC_RC120M 
PCL_MC_RC8M 
PCL_MC_CRIPOSC 
enum pcl_osc_t

The different oscillators.

Enumerator
PCL_OSC0 
PCL_OSC1 

long int pcl_configure_clocks ( pcl_freq_param_t param)

Automatically configure the CPU, PBA, PBB, and HSB clocks.

This function needs some parameters stored in a pcl_freq_param_t structure:

  • main_clk_src is the id of the main clock source to use,
  • cpu_f and pba_f and pbb_f are the wanted frequencies,
  • osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
  • osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
  • dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll.

The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.

Note
: since it is dynamically computing the appropriate field values of the configuration registers from the parameters structure, this function is not optimal in terms of code size. For a code size optimal solution, it is better to create a new function from pcl_configure_clocks() and modify it to use preprocessor computation from pre-defined target frequencies.
Parameters
parampointer on the configuration structure.
Return values
0Success.
<0The configuration cannot be performed.

Automatically configure the CPU, PBA, PBB, and HSB clocks.

References pcl_configure_clocks_uc3l(), pcl_configure_synchronous_clocks(), pcl_freq_param_t, and pm_configure_clocks().

long int pcl_configure_clocks_dfll0 ( pcl_freq_param_t param)

Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock.

This function needs some parameters stored in a pcl_freq_param_t structure:

  • cpu_f and pba_f and pbb_f are the wanted frequencies,
  • dfll_f is the target DFLL frequency to set-up
Note
: when the DFLL0 is to be used as main source clock for the synchronous clocks, the target frequency of the DFLL should be chosen to be as high as possible within the specification range (for stability reasons); the target cpu and pbx frequencies will then be reached by appropriate division ratio.

Supported main clock sources: PCL_MC_DFLL0

Supported synchronous clocks frequencies: (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.

Note
: by default, this implementation doesn't perform thorough checks on the input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
: since it is dynamically computing the appropriate field values of the configuration registers from the parameters structure, this function is not optimal in terms of code size. For a code size optimal solution, it is better to create a new function from pcl_configure_clocks_dfll0() and modify it to use preprocessor computation from pre-defined target frequencies.
Parameters
parampointer on the configuration structure.
Return values
0Success.
<0The configuration cannot be performed.

References pcl_configure_synchronous_clocks().

Referenced by pcl_configure_clocks_uc3l().

long int pcl_configure_clocks_osc0 ( pcl_freq_param_t param)

Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock.

This function needs some parameters stored in a pcl_freq_param_t structure:

  • cpu_f and pba_f and pbb_f are the wanted frequencies,
  • osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
  • osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).

Supported main clock sources: PCL_MC_OSC0

Supported synchronous clocks frequencies: (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.

Note
: by default, this implementation doesn't perform thorough checks on the input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
: since it is dynamically computing the appropriate field values of the configuration registers from the parameters structure, this function is not optimal in terms of code size. For a code size optimal solution, it is better to create a new function from pcl_configure_clocks_osc0() and modify it to use preprocessor computation from pre-defined target frequencies.
Parameters
parampointer on the configuration structure.
Return values
0Success.
<0The configuration cannot be performed.

References pcl_configure_synchronous_clocks().

Referenced by pcl_configure_clocks_uc3l().

long int pcl_configure_clocks_rc120m ( pcl_freq_param_t param)

Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock.

This function needs some parameters stored in a pcl_freq_param_t structure:

  • cpu_f and pba_f and pbb_f are the wanted frequencies

Supported main clock sources: PCL_MC_RC120M

Supported synchronous clocks frequencies: 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.

Note
: by default, this implementation doesn't perform thorough checks on the input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
: since it is dynamically computing the appropriate field values of the configuration registers from the parameters structure, this function is not optimal in terms of code size. For a code size optimal solution, it is better to create a new function from pcl_configure_clocks_rc120m() and modify it to use preprocessor computation from pre-defined target frequencies.
Parameters
parampointer on the configuration structure.
Return values
0Success.
<0The configuration cannot be performed.

References pcl_configure_synchronous_clocks().

Referenced by pcl_configure_clocks_uc3l().

long int pcl_configure_clocks_rcsys ( pcl_freq_param_t param)

Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock.

This function needs some parameters stored in a pcl_freq_param_t structure:

  • cpu_f and pba_f and pbb_f are the wanted frequencies

Supported main clock sources: PCL_MC_RCSYS

Supported synchronous clocks frequencies: 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.

Note
: by default, this implementation doesn't perform thorough checks on the input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
: since it is dynamically computing the appropriate field values of the configuration registers from the parameters structure, this function is not optimal in terms of code size. For a code size optimal solution, it is better to create a new function from pcl_configure_clocks_rcsys() and modify it to use preprocessor computation from pre-defined target frequencies.
Parameters
parampointer on the configuration structure.
Return values
0Success.
<0The configuration cannot be performed.

References pcl_configure_synchronous_clocks().

Referenced by pcl_configure_clocks_uc3l().

long int pcl_configure_usb_clock ( void  )

Configure the USB Clock.

Returns
Status.
Return values
0Success.
<0An error occurred.

References AVR32_SCIF_GC_NO_DIV_CLOCK, AVR32_SCIF_GCLK_USBC, PASS, PCL_NOT_SUPPORTED, pcl_read_gplp(), pcl_write_gplp(), pm_configure_usb_clock(), pm_read_gplp(), and pm_write_gplp().

unsigned long pcl_read_gplp ( unsigned long  gplp)

Read the content of the GPLP registers.

Parameters
gplpGPLP register index (0,1,... depending on the number of GPLP registers for a given part)
Returns
The content of the chosen GPLP register.

Referenced by pcl_configure_usb_clock().

long int pcl_switch_to_osc ( pcl_osc_t  osc,
unsigned int  fcrystal,
unsigned int  startup 
)

Switch the main clock source to Osc0 configured in crystal mode.

Parameters
oscThe oscillator to enable and switch to.
fcrystalOscillator external crystal frequency (Hz)
startupOscillator startup time.
Returns
Status.
Return values
0Success.
<0An error occurred.

Switch the main clock source to Osc0 configured in crystal mode.

References flashc_set_flash_waitstate_and_readmode(), PASS, PCL_NOT_SUPPORTED, PCL_OSC0, and pm_switch_to_osc0().

void pcl_write_gplp ( unsigned long  gplp,
unsigned long  value 
)

Write into the GPLP registers.

Parameters
gplpGPLP register index (0,1,... depending on the number of GPLP registers for a given part)
valueValue to write

Referenced by pcl_configure_usb_clock().